Due to regular atomic arrangement, high carrier mobility (10-300 cm2/Vs) and high drive current, low temperature polycrystalline silicon (LTPS) accelerates the response of liquid crystal, shortens the volume of thin film transistor (TFT) and increases the light transmission area of pixel so that higher brightness and higher resolution can be obtained. Therefore, the LTPS is widely adopted in the thin film transistor to form an active layer.
In a conventional method of realizing crystallization of amorphous silicon by a rapid thermal annealing (RTA) process to form polycrystalline silicon, the RTA is performed under a temperature range around 750° C. However, a softening temperature of a normal glass substrate is about 700° C., and thus the crystallization of amorphous silicon cannot be performed on the normal glass substrate. In addition, in the case of high-temperature crystallization, crystal nucleus is excessive, which is not favorable for the formation of crystal gains with large size. In addition, the high-temperature crystallization increases the internal stress of a film, which results in more crystal defects.
Therefore, the polycrystalline silicon thin film formed by the conventional RTA process is small in size, uneven in distribution and high in film roughness, which will result in the decline of the electric properties (such as mobility, leakage current, mobility uniformity, uniformity of threshold voltage, etc.) of the low temperature polycrystalline silicon thin film transistor.